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2nd-order IIR filters : a well structured zoo

DSP related issues, mathematics, processing and techniques

2nd-order IIR filters : a well structured zoo

Postby steph_tsf » Sat Feb 29, 2020 12:05 pm

Some pedagogy is required for paving the future. There are many different kinds of 2nd-order IIR filters. Some result from recent achievements. See Martin Vicanek work. See Vadim Zavalishin work.

One should rename the 2P2Z built-in component.
Name : IIR Biquad DF1
Help : Direct Form 1 IIR Biquad Filter providing one output. Requires a controller.

The 2nd-order IIR filters zoo:

Name : IIR Biquad DF2
Help : Direct Form 2 IIR Biquad Filter providing one output. Requires a controller.

Name : IIR USV Rect
Help : Rectangular Integration Universal State Variable Filter providing three complementary synchronous 0 dB outputs consisting in LP, BP (constant gain), and HP. Requires a controller.

Name : IIR USV Trap
Help : Trapezoidal Integration Universal State Variable Filter providing three complementary synchronous 0 dB outputs consisting in LP, BP (constant gain), and HP. Requires a controller.

The corresponding controllers:

Name : IIR-C Biquad BLT
Help : Bilinear Transform IIR Biquad Filter Controller.

Name : IIR-C Biquad AMAT LP
Help : Analog-Matching Lowpass IIR Biquad Filter Controller.

Name : IIR-C Biquad AMAT BP
Help : Analog-Matching Bandpass IIR Biquad Filter Controller.

Name : IIR-C Biquad AMAT HP
Help : Analog-Matching Highpass IIR Biquad Filter Controller.

Name : IIR-C USV Rect BLT
Help : Bilinear Transform Rectangular Integration Universal State Variable Filter Controller.

Name : IIR-C USV Trap BLT
Help : Bilinear Transform Trapezoidal Integration Universal State Variable Filter Controller.

The corresponding museum:

Motorola APR2/D Digital Stereo 10-Band Graphic Equalizer Using the DSP56001 (Motorola Inc.,1988)
https://www.chameleon.synth.net/files/developer/pdf/motorola/APR2-d.pdf
DSP56001 Graphic Equalizer - Dataflow (650 pix).jpg
DSP56001 Graphic Equalizer - Dataflow (650 pix).jpg (50.34 KiB) Viewed 9291 times

DSP56001 Graphic Equalizer - ASM (650 pix).jpg
DSP56001 Graphic Equalizer - ASM (650 pix).jpg (80.94 KiB) Viewed 9291 times
Please click the images for viewing them entirely. What's the name of such structure? A parallelized "peaking" filter? The 10 bandpass filters get parallel-wired, battling against each other. They are also battling against a passthrough, also parallel-wired (line 363, MAC instruction). In case the Equalizer is set to remain flat, all bandpass scales equal zero. All bandpass filters thus stop contributing to the audio output (line 351, MAC instruction). The Equalizer then behaves like a copper wire. In theory, a +1.00 scale should provides a +6 dB peak, and a -0.50 scale should provides a -6 dB valley. This isn't so because the passthrough is actually a 12 dB attenuation. This allows a approx relative 14 dB peak at the frequency whose bandpass filter scale got set to +1.00, which is already causing a digital saturation risk because of the in-phase summing of the 0 dBFS bandpass signal, with the -12 dB passthrough signal. In such implementation, Fs = 88.2 kHz and all Q values = 1.4. The measured gain in function of frequency on page 18 (of the .pdf), clearly exhibits the typical digital-analog mismatch of the 16,000 Hz bandpass filter. The cause of such digital-analog mismatch is explained on page 4 (of the .pdf) and following. Above Fs/8, the easy SAA (Small Angle Approximation) frequency response calculation (pretending there is a digital-analog match), become imprecise. Above Fs/8, one must revert to a more comprehensive, exact frequency response calculation, that's embedding the exact BLT (Bi-Linear Transform) definition. In 2020, the same Equalizer could be built, now relying on a Analog-Matching Bandpass IIR Biquad Filter, what's regarding the 16,000 Hz section. People may say there is a "frequency warping" occurring above Fs/8. I don't approve such terminology. It is confusing. People working in audiology (hearing aids, voice reeducation, etc) may understand that such 22 years old Motorola Equalizer that's dating back from 1988, is bad, transposing a 16 kHz sound into another frequency. This is of course not the case. Such 22 years old Motorola Equalizer that's dating back from 1988, that's working at twice the Compact Disc sampling frequency, that's processing 24-bit audio data and 24-bit IIR Biquad filters coefficients, generating 48-bit precision intermediate results in the A or B accumulators, should not be underestimated. Because of guaranteeing a 24+24=48 bit accumulating precision, all in fixed point, it still beats nowadays IEEE 754 32-bit FPUs that are only featuring a 24+24=24 bit accumulating precision, when restricted to fixed point, the sole and only operating mode that's guaranteeing a constant, minimal digital granularity. Moreover, in case the Motorola 56001 is executing a 256-tap FIR filter that's processing 24-bit audio data and 24-bit coefficients, no digital saturation can occur because the A (and B also) 48-bit accumulator features 8 headroom extension bits (56 bits in total, hence the 56000 family name), allowing the progressively accumulating audio signal to become 256 times larger than the incoming 24-bit audio signal. Such was the audio ambition in 1986, upon launching the Motorola 56000 Family, only three years after the CD audio appearance. Call it the golden audio years. Same years I got my degree in electronics. Around year 2013, three years after Motorola ceased producing the DSP56K family, Analog Devices managed to perpetuate such ambition. Today, in 2020, one still can purchase ADAU1761 chips, approx $10 each, 50 MIPS (in theory, 20 times less powerful than a 1 GFLOP Flowstone), 22-lead, 5mm×5mm LFCSP, only consuming 25 mW, can be powered by a single LiFePO4 or Li-ion cell (1.80 VDC to 3.65 VDC). There is the EVAL-ADAU1761Z (evaluation board) costing approx $200. Programming is done through a graphical DSP signal flow development app whose name is SigmaStudio, kind of Flowstone could we say.

Today, one can say goodbye to the DSP56K architecture and circuit boards, etc.

Today there can be a ASIO-USB2 software driver and ASIO-USB2 hardware dongle that's embedding a STM32H747 (USB High Speed 480 Mbit/s, grabbing many ASIO streams from USB2, returning the processed ASIO streams to USB2), eventually helped by one or two more STM32H747 (grabbing audio from SAI, processing audio full steam, returning the processed audio to SAI).

Your comments, always welcome.
steph_tsf
 
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Joined: Sun Aug 15, 2010 10:26 pm

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